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Replying in the Lok Sabha on 12 August 2026, the Ministry of Electronics and Information Technology said more than 68,000 students have been trained in semiconductor chip design under the Chips to Start-ups (C2S) programme.
The programme has enabled 254 chip designs to be taken to tape-out — 175 of them at the 180 nm technology node at the Semi-Conductor Laboratory, Mohali, and 79 at overseas foundries.
332 academic institutions have been given access to advanced Electronic Design Automation (EDA) tools under the programme.
C2S was launched by MeitY in 2022 as an umbrella capacity-building initiative with an outlay of Rs 250 crore over five years, targeting 85,000 industry-ready professionals at B.Tech, M.Tech and PhD levels.
It also aims to incubate 25 start-ups and enable 10 technology transfers, and gives students hands-on work on ASICs, Systems-on-Chip and IP core designs.
A tape-out is the moment a chip design is finished and released to a foundry for fabrication — the point at which a design stops being a file and becomes a manufacturing order. The name survives from the era when the finished layout was written to magnetic tape and physically carried to the fab. For a student programme, the number of tape-outs is the honest measure of output, because a design that never reaches a foundry has never been tested against physical reality. The technology node — 180 nm here — refers broadly to the generation of the manufacturing process. Smaller nodes pack more transistors into the same area and are used for cutting-edge processors; 180 nm is a mature node, which is exactly what makes it suitable for training, prototypes and a large class of industrial, automotive and power-management chips that do not need leading-edge density.
Simple Analogy: Tape-out is a manuscript going to the printing press: everything before it is editing, and everything after it is a physical object that either works or does not.
Build a design talent pool and support academic chip design from concept to fabrication
Key: Provides EDA tools, mentorship and foundry access so student and start-up designs can actually be taped out
Support Indian companies designing semiconductors, from design stage to deployment
Key: Offers financial incentives and design infrastructure support to domestic chip-design firms and start-ups
Build a domestic semiconductor and display manufacturing ecosystem
Key: The nodal agency under MeitY for fab, display fab, ATMP/OSAT and compound semiconductor proposals
GS Paper III > Science and Technology — Indigenisation of technology and developing new technology; Achievements of Indians in science and technology
General Awareness > Government Schemes and Science and Technology
General Awareness > Current Events of National Importance
Which of the following elements is a "Metalloid"?
Answer: Silicon
Which of the following elements is a metalloid?
Answer: Silicon
The release of a completed chip design to a foundry for fabrication
Electronic Design Automation software used to design, simulate and verify integrated circuits
Application-Specific Integrated Circuit — a chip built for one particular use rather than for general-purpose computing
System-on-Chip — a single chip integrating processor, memory and other subsystems
A shorthand for the generation of a chip manufacturing process, such as 180 nm; smaller nodes allow denser, faster chips