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Replying in the Lok Sabha on 12 August 2026, the Ministry of Electronics and IT said more than 34 lakh candidates have registered on the FutureSkills PRIME portal, 23 lakh-plus have been enrolled or trained and over 13 lakh have been certified — 41% of them women and over 86% from Tier 2 and Tier 3 cities.
FutureSkills PRIME is run by MeitY jointly with NASSCOM; its portal hosts more than 500 industry-aligned courses, and 22 C-DAC and NIELIT centres act as Lead and Co-Lead Resource Centres for ten emerging technologies.
A separate reply the same day reported that the Chips to Start-ups (C2S) programme has trained over 68,000 students against a target of 85,000, given 332 academic institutions access to advanced EDA tools, and enabled 254 chip designs to be taped out.
Of those 254 tape-outs, 175 were at the 180 nm technology node at the Semi-Conductor Laboratory, Mohali, and 79 at overseas foundries.
Allocations for FutureSkills PRIME have risen steeply — from ₹26.59 crore in FY 2022-23 to ₹137.17 crore in FY 2026-27.
Skill, reskill and upskill candidates in emerging technologies to make India a digital talent nation
Key: A MeitY programme run jointly with NASSCOM (the National Association of Software and Services Companies). Its beta platform was launched in November 2020. It is a Central Sector Scheme, hosts 500-plus industry-aligned courses developed in consultation with industry, and is delivered both online and through C-DAC and NIELIT resource centres.
Close the workforce and design-infrastructure gap in semiconductor chip design
Key: Launched by MeitY in December 2021 alongside the ₹76,000 crore semiconductor programme. It targets 85,000 industry-ready engineers in VLSI and embedded system design over five years, along with ASIC and System-on-Chip prototypes, working through academic institutions, R&D organisations, start-ups and MSMEs. It supplies EDA tool access and funds tape-outs.
Use digital technologies to improve citizens' lives, expand the digital economy and create employment
Key: Launched in July 2015; FutureSkills PRIME sits within this broader programme.
Build AI-ready talent, particularly outside metropolitan centres
Key: The IndiaAI Mission was approved on 7 March 2024 with an outlay of ₹10,371.92 crore over five years across seven pillars — Compute Capacity, Innovation Centre / Foundation Models, Datasets Platform, Application Development Initiative, FutureSkills, Startup Financing and Safe & Trusted AI. Under its FutureSkills pillar, 27 IndiaAI Data and AI Labs have been established through NIELIT centres to give hands-on training in AI and data science, focused on Tier 2 and Tier 3 cities.
Build the design and manufacturing ecosystem the skilling programmes feed
Key: The National Policy on Electronics, SPECS, EMC 2.0 and the PLI schemes on the manufacturing side, with C2S and FutureSkills PRIME supplying the design and digital workforce.
Industry association for the Indian technology and services sector; MeitY's implementing partner for FutureSkills PRIME, and the body whose sector skill council has signed MoUs with 17 state governments and 2,000-plus academic institutions.
Delivers education, skilling and digital competency programmes in Information, Electronics and Communications Technology, including drone operation, data analytics and cyber security. It has 56 of its own centres and over 9,000 partner institutes, has trained 31 lakh-plus candidates in the last three years, and hosts the 27 IndiaAI Data and AI Labs.
The premier R&D organisation of MeitY for IT, electronics and associated areas, originally set up to build supercomputers; together with NIELIT it runs the FutureSkills PRIME resource centres.
India's government-owned semiconductor fabrication facility, running an 8-inch wafer fab at the 180 nm CMOS node used mainly for space, defence and medical applications. It fabricated 175 of the 254 chip designs taped out under C2S.
Implements the Semicon India Programme for fabs, display fabs, compound semiconductors and packaging, and supports the design ecosystem that C2S feeds with trained engineers. It functions as an independent business division within the Digital India Corporation.
A tape-out is the moment a finished chip design is sent to a foundry for fabrication — the point at which a student project stops being a simulation and becomes silicon. The 'node' (180 nm, 28 nm, 5 nm and so on) broadly describes how small the transistor features are: a smaller node packs more transistors into the same area and consumes less power per operation. SCL Mohali operates at 180 nm, a mature node far behind the leading edge used for smartphone processors, but entirely adequate — and preferred — for space, defence, automotive and medical electronics, where radiation tolerance, reliability and long production life matter more than raw density. That is why 175 of the 254 C2S tape-outs happened at SCL while 79 more advanced designs went to overseas foundries. Electronic Design Automation (EDA) tools are the specialised software used to design, simulate and verify a chip before tape-out; access to them is expensive, which is why supplying them to 332 institutions is itself a core part of the programme.
Simple Analogy: A tape-out is like sending a finished manuscript to the printing press — and the node is the fineness of the type: 180 nm is a sturdy, reliable large print, while leading-edge nodes are microtype that fits far more on a page but needs a far more delicate press.
C2S is the talent leg of the same semiconductor push whose manufacturing leg — Semicon 1.0 at ₹76,000 crore and Semicon 2.0 at ₹1,27,500 crore — approves fabs and packaging units. Fabs without designers, and designers without fabs, are both dead ends; the two programmes are deliberately paired.
The MoUs with 17 state governments and 2,000-plus institutions embed these industry courses into formal degree curricula for academic credit, which is the mechanism by which a MeitY skilling programme reaches into the university system.
The FutureSkills pillar of the ₹10,371.92 crore IndiaAI Mission uses the same NIELIT network, showing how one delivery infrastructure is reused across skilling missions.
Both data sets were tabled as Lok Sabha replies on 12 August 2026 — by Ashwini Vaishnaw for FutureSkills PRIME and Jitin Prasada for C2S — a reminder that ministry-wise scheme performance data most often enters the public record through Parliament questions.
The explicit reporting of North Eastern, Himalayan and Sikkim-specific figures reflects the standing requirement that central ministries earmark and report expenditure in the North Eastern Region.
GS Paper 3 > Science and Technology > Indigenisation and Emerging Technologies; GS Paper 2 > Government Policies for Human Resource Development
General Awareness > Government Schemes and Science and Technology
General Awareness > Government Initiatives and Technology
General Awareness > Current Affairs
Semiconductor policy has appeared in Prelims and in Mains science and technology questions in successive years; skilling programme names and their implementing partners are staple SSC and banking general awareness material.
The point at which a completed chip design is handed to a foundry for fabrication; 254 tape-outs have happened under C2S.
Electronic Design Automation software used to design, simulate and verify integrated circuits; C2S supplies it to 332 institutions from vendors including Synopsys, Cadence and Siemens EDA.
A shorthand for transistor feature size, such as 180 nm at SCL Mohali; mature nodes remain preferred for space, defence, automotive and medical electronics.
A scheme fully funded and implemented by the Centre, with funds allocated centrally rather than apportioned to states — the reason FutureSkills PRIME reports outcomes, not money, state-wise.
The framework under which credits earned through such industry-aligned courses can be recognised within formal academic programmes.